Knowledge and experience:
• You have a solid background with more than 5+ years of experience of ASIC verification
• Good command of UVM verification and SystemVerilog
• Used to work with complex ASIC and/or large FPGA design
• Experience from IP block verification
• Multi clock domains
• RTL within Verilog, VHDL and/or SystemVerilog
• Good English skills, in both speech and writing
Meritorious if you have:
• Test bench structuring and design
• Leadership qualities
• RTL design knowledge
• Scripting skills
• Lab experience
• Telecommunication
Cubane is a Swedish IT consulting firm with over ten years of experience and a proven track record of assembling and leading teams of qualified IT specialists. Cubane is a business that is managed by a group of strong female executives. Read More
